CoE 243 Logic Gates Lab

Purpose:

1. Become familiar with the TTL Data Book.

2. Know how to wire a digital integrated circuit.

3. Know how to use the digital experiment board.

4. Verify the operation of various logic gates.

Procedure:

Connect the hardware and prove the truth table for the following logic gates.

Draw a schematic diagram, with pin numbers and power connections, for each circuit in the "Schematics" section of the lab report.

Complete the truth table of expected results and actual results for each circuit. Put the truth tables in the "Experiment Data" section of the lab report.

    74LS00 NAND Gate

    74LS02 NOR Gate

    74LS08 AND Gate

    74LS32 OR Gate

    74LS86 XOR Gate

Connect a 74LS04 NOT (Inverter) gate. Draw its schematic diagram and check its truth table.

From the data sheet, record the expected voltage range of a logic HIGH output and a logic LOW output. Using the DVM, measure and record the actual output voltage for each logic level.

Now, remove the input wire from the NOT gate.  Record the logic level of its output.

Questions:

(These are meant to help you form some conclusions for your lab report.)

How do the measured logic high and logic low voltages compare with those listed in the data sheet?

What logic level is the output of a 74LS04 when the input is left unconnected (input wire is removed)? What logic level does the gate seem to interpret the unconnected input as? What conclusion can you make about how an unconnected input affects a TTL gate?